diff --git a/include/asm-arm/arch-arm1136/mem.h b/include/asm-arm/arch-arm1136/mem.h
index 2ead7d8..dfaf568 100644
--- a/include/asm-arm/arch-arm1136/mem.h
+++ b/include/asm-arm/arch-arm1136/mem.h
@@ -68,8 +68,8 @@
 # define H4_2420_SDRC_RFR_CTRL_ES1	0x00002401
 # define H4_2420_SDRC_RFR_CTRL		0x0002da01
 #endif
-#define H4_2420_SDRC_DLLA_CTRL		0x00007307 /* load value at 100Mhz */
-#define H4_2420_SDRC_DLLB_CTRL		0x00007307
+#define H4_2420_SDRC_DLLA_CTRL		0x0000E307 /* DLL value used for 50MHz */
+#define H4_2420_SDRC_DLLB_CTRL		0x0000E307 /* allow DPLLout*1 to work */
 
 #define H4_2422_SDRC_SHARING		0x00004b00
 #define H4_2422_SDRC_MDCFG_0_DDR	0x00801011 /* stacked ddr on 2422 */
diff --git a/include/asm-arm/arch-arm1136/omap2420.h b/include/asm-arm/arch-arm1136/omap2420.h
index a2a9798..eba385c 100644
--- a/include/asm-arm/arch-arm1136/omap2420.h
+++ b/include/asm-arm/arch-arm1136/omap2420.h
@@ -31,6 +31,12 @@
  * 2420 specific Section
  */
 
+/* L3 Firewall */
+#define A_REQINFOPERM0        0x68005048
+#define A_READPERM0           0x68005050
+#define A_WRITEPERM0          0x68005058
+#define GP_DEVICE             (BIT8|BIT9)
+
 /* CONTROL */
 #define OMAP2420_CTRL_BASE    (0x48000000)
 #define CONTROL_STATUS        (OMAP2420_CTRL_BASE + 0x2F8)